The disclosed embodiments of the present invention relate to decoding code blocks by using a turbo decoder, and more particularly, to a decoding apparatus with adaptive control over an external buffer interface and a turbo decoder and related decoding method thereof.
Data signals, in particular those transmitted over a typically hostile channel, are susceptible to channel noise/interference. Various methods of error correction coding have been developed in order to minimize the adverse effects that a hostile channel has on the integrity of the transmitted data. This is also referred to as lowering the bit error rate (BER), which is generally defined as the ratio of incorrectly received information bits to the total number of received information bits. Error correction coding generally involves representing digital data in ways designed to be robust with respect to error bits. Hence, error correction coding may enable a communications system to recover original data from a signal that has been corrupted due to the undesired channel noise/interference. For example, turbo codes may be used in the communications system, such as a Wideband Code Division Multiple Access (WCDMA) system and a Long Term Evolution (LTE) system, for channel coding.
It is possible that a turbo decoder encounters decoding fail when decoding code blocks/transport blocks. A hybrid automatic repeat request (HARQ) mechanism may be active when the decoding fail occurs. The HARQ mechanism is a transmission technique that combines automatic repeat request (ARQ) and forward error correction (FEC) by requesting a retransmission whenever data is detected as incorrect and combining the new transmission with the previous one for a higher reliability in the wireless channels. That is, the HARQ mechanism exploits information of the erroneous data after retransmission. Due to its superior reliability, the HARQ mechanism becomes a crucial component of the communications system. Although the performance advantage is very attractive, implementing the HARQ mechanism is a challenge for high throughput communications systems. Specifically, a large amount of data needs to be stored in the HARQ buffer. In general, data is stored in a cheaper external shared HARQ memory instead of an expensive internal dedicated HARQ memory. That is, the conventional receiver design stores each code block to be decoded into the external HARQ memory. However, compared to reading data from and writing data into the internal HARQ memory, reading data from the external shared HARQ memory and writing data into the external shared HARQ memory would have higher power consumption. Further, the external shared HARQ memory may be an off-chip memory (e.g., a dynamic random access memory) which is also used by other hardware components for data buffering. Thus, the HARQ mechanism has to compete with other hardware components to access the shared memory bus of the off-chip memory. When the shared memory bus is busy, frequently accessing the off-chip memory for reading/writing HARQ data may have degraded performance.
Besides, when decoding a transport block, the conventional turbo decoder is generally arranged to decode each code block by using a fixed number of iterations. However, using a fixed number of iterations will cause performance loss for lower throughput communications systems and design difficulty for higher throughput communications systems. Though the conventional turbo decoder may employ a code block based early termination to skip remaining iterations for stopping the iterative decoding procedure of a code block earlier, it may not be enough for a low-power receiver design.
Thus, there is a need for an innovative decoder design which is capable of achieving improvement and balance on cost, power consumption and system performance.